IN9260 – Low Power IoT nodes
Course description
Course content
CMOS technology will continue being the work-horse of ICT technologies for the foreseeable future, but added value is to an increasing extent being provided by augmenting programmable micro- and nanoscale CMOS computational systems with other technologies.
You learn about how to build miniature wireless programmable computing systems in technologies having different mechanisms for sensing and actuation, enabled by technologies augmenting the CMOS core. A focus is towards low power/low energy implementations.
Future "More-than-Moore" technologies augmenting traditional CMOS is also included in the curriculum.
Learning outcome
The main learning outcome is to understand and be able to design different parts of sensing, computing and communicating electronic systems interacting with people or their environment often depending on harvesting energy from their surroundings.
You will learn about:
- principles behind different sensors that are typically included in sensing and communicating micro- and nanosystems.
- signal conditioning, including but not limited to, data converters, and about the implementation of such, in modern nanoscale technologies.
- principles for implementing wireless communication?
- power management and energy harvesting
- information representation in electronic systems, and tradeoffs regarding which computations are done in an analog or a digital fashion
A special focus is towards low power/low energy implementations of signal processing circuits, which includes topics like state machines as well as robust programmable processor architectures.
Inluded in the curriculum is also principles and applications for "More than Moore" technologies augmenting traditional CMOS.
Electronic Design Automation (EDA) tools will?be used.
Admission to the course
PhD candidates from the University of Oslo should apply for classes and register for examinations through?Studentweb. If a course has limited intake capacity, priority will be given to PhD candidates who follow an individual education plan where this particular course is included.
PhD candidates who have been admitted to another higher education institution must?apply for a position as a visiting student?within a given deadline.
?
IN5260?and IN9260?will be assessed together in regards to?the number of admissions, with?priority given to PhD candidates belonging to the Faculty of Mathematics and Natural Sciences with IN9260 in an approved study plan.
Recommended previous knowledge
Solid background at university level within analog CMOS integrated circuits as well as digital circuits and systems. This can include for example: IN5180 – Analog Microelectronics Design, IN2060 – Digital Design and Computer Architecture
A master's degree within micro-/ Nano-electronics or related fields.
Overlapping courses
- 10 credits overlap with IN5260 – Low Power IoT nodes.
Teaching
3 hours of lectures and 2 scheduled hours of lab work (Circuit design lab). Some of the teaching will be given as supervision in labs/exercise classes. Mandatory assignments must be approved prior to the exam.
Any access to foundry Process Design Kits (PDKs) require students to sign an NDA.
Examination
This course has mandatory assignments that have to be approved prior to the exam.
The final exam will be an oral or 4 hours written exam depending on the number of course attendees. The project assignment must be presented for the class and teaching staff.
The course grade is based on the following assessments:
Exercises and project assignment with presentation (40%)
Final exam (60%), oral/written.
All parts of the exam must be passed and must be passed in the same semester.
?
It will also be counted as one of your three attempts to sit the exam for this course, if you sit the exam for one of the following courses: IN5260.
Examination support material
All printed and written resources are allowed.
Grading scale
Grades are awarded on a pass/fail scale. Read more about?the grading system.
More about examinations at UiO
- Use of sources and citations
- Special exam arrangements due to individual needs
- Withdrawal from an exam
- Illness at exams / postponed exams
- Explanation of grades and appeals
- Resitting an exam
- Cheating/attempted cheating
You will find further guides and resources at the web page on examinations at UiO.