INF5063 - ARM Resources & FAQ
Page for resources and frequently asked questions for the Jetson TX1 ARM machines. If you have any other questions, please send an email to inf5063@ifi.uio.no
The following table gives an overview of the status of the ARM machines in the lab at Simula.
Remember that you have to SSH into oslo.mlab.no (or oslo.simula.no) to access the lab-net at Simula. From here you can ssh to "tegra-x.mlab.no"
Username and password will be provided to all groups:
| Computer | CPU | SSE Version | Status |
| tegra-1.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Up |
| tegra-2.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Up |
| tegra-3.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Up |
| tegra-4.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Up |
| tegra-5.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Up |
| tegra-6.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Up |
| tegra-7.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Down |
| tegra-8.mlab.no | NVIDIA Tegra X1 | ARMv8 / NEON | Down |
ARM Programming Resources
ARM Cortex-A Series Programmer's Guide for ARMv8-A
ARM NEON Programming Quick Reference
Frequently Asked Questions
Q: There are no files in /opt/cipr !
A: We're waiting for memory cards for the Jetsons. In the meantime use the NFS home areas. The videos can be found here: https://media.xiph.org/video/derf/
Q: How about compiler optimizations?
A: For this assignment you are going to use no automatic vectorization.
Q: What tools are available for profiling my code?
A: Have a look at gprof, kcachegrind
Q: Can we copy/paste a fast DCT implementation optimized for NEON which we found on the Internet into our code?
A: No, you may not.
Q: What kind of speed improvements are you expecting from our code??
A: We do not expect a certain percentage of improvement. We want you to experiment with instructions that can exploit the built in parallelism of the ARM architecture, and describe in your report what you have tried, and what you have achieved. What part of the code have you investigated? What did you try? How did it go? This is the most important. It is positive if you can document a pattern in the improvements. It is no need to speculate in how the processor parallelize, since we lack documentation to be able to evaluate if the speculation is correct or not.